In a computer system it is both desirable and useful to determine how efficiently a resource is being used. It is particularly useful to monitor software code utilization of a central processor unit (CPU). A most meaningful measure is the product of code utilization and time spent in the execution of each code instruction. Typically, 10 percent of the code instructions require 90 percent of the CPU time utilized. An evaluation of this 10 percent of the code instructions through monitoring of the particular code module including those instructions can result in more efficient use of the CPU.
Heretofore, such evaluation was realized by use of a separate hardware monitor. Prior monitor arrangements were typically hand-wired to test locations in a CPU back plane and used to collect date relative to the physical addresses of the code and not the virtual code addresses. As is well known, the physical address is typically different from the virtual address. Consequently, the data collected relative to physical addresses must be unmapped or reduced in order to determine which code instructions were actually using the CPU. It is the virtual address information that is useful to a programmer. This is especially a problem in computer systems using memory management techniques. By way of example, each individual program subroutine is written by a programmer in a manner such that the code instruction numbering begins at address zero. However, since numerous subroutines are employed in a computer system, the specific code instructions of a routine may be stored in memory locations beginning with an address of, for example, 80,000,000. This 80,000,000 number is the virtual address of the first code instruction of the subroutine. The 80,000,000 virtual address may correspond to a physical address of zero. Similarly, instructions of another subroutine may have virtual addresses of zero to 5,000 while the corresponding physical addresses are 5,000 to 10,000. Consequently, data accumulated by addressing physical locations via the prior hardware monitors must be unmapped to obtain information relative to the virtual addresses of the code instructions. Again, it is the virtual address information which is then useable by the programmer for evaluating code efficiency.
Such hardware monitors are further undesirable because of their cost and the need for time-consuming data reduction. Furthermore, they are not readily adaptable for use with newer CPUs since there is less access in the newer CPUs because of the lack of physical test positions to connect to.